Semiconductor Production Testing

1. Overview

S1 Foundry provides a complete semiconductor production test infrastructure that abstracts probe station hardware, component handlers, wafer geometry, binning logic, and test data formatting behind a consistent API. Test programs written against these interfaces are portable across equipment vendors and can be deployed in wafer sort, final test, and multi-site parallel test environments without modification.

The semiconductor subsystem is organized into four independently deployable libraries and one TestStand integration package:

2. Probe Station Integration

The probe station handler layer provides a single IProbeStationHandler interface that encapsulates all wafer prober operations. Test programs call the same methods regardless of the physical probe station in use — driver selection happens at configuration time, not in the test sequence.

Supported Platforms

Capabilities

• Chuck positioning — X/Y/Z/Theta movement with micrometer precision, vacuum control, and theta rotation for angular alignment.
• Die stepping — Step to first die, next die, specific die by row/column, or relative offset. Supports row-major, column-major, and serpentine stepping patterns through the wafer map library.
• Contact and separation — Probe contact and separation commands with real-time contact force measurement and overtravel detection.
• Automatic alignment — Pattern recognition-driven auto-align with X, Y, and theta correction feedback.
• Wafer loading — Cassette slot-based wafer load and unload with slot tracking.
• Thermal control — Chuck temperature setpoint management for hot and cold characterization. Per-driver min/max temperature limits enforced at the interface level.
• Edge sensing — Wafer edge detection and flat/notch orientation for coordinate system calibration.

3. Wafer Map Management

The wafer map library models the complete die layout of a semiconductor wafer, providing the spatial reference frame for all die-level operations. Maps can be imported from industry-standard file formats or constructed programmatically.

Map Import

• SINF format — The SinfParser reads Semi Industry Numeric Format files containing wafer geometry, die grid layout, reference die position, and bin definitions.
• XML format — The XmlMapParser handles XML-based wafer map files used by various probe station vendors and MES systems.
• Programmatic construction — The WaferMapBuilder creates maps from wafer diameter, die pitch, reference die coordinates, and exclusion zone definitions.

Die Grid Navigation

Each die in the map is addressed by its row and column indices. The model tracks physical X/Y coordinates, bin assignment, test result (pass/fail), ink marks, and per-die site assignment for multi-site configurations. Four stepping patterns are supported:

• Row-major left-to-right — Standard ascending row and column order.
• Row-major right-to-left — Ascending rows, descending columns.
• Column-major — Ascending columns, then rows.
• Serpentine — Alternating left-to-right and right-to-left per row, minimizing chuck travel distance.

Yield and Analysis

The CalculateYield method computes total die count, tested die count, pass/fail counts, per-bin distribution, and overall yield percentage. Combined with the bin definitions from the binning engine, this data feeds real-time yield heat-maps and wafer-level reporting.

• Edge die detection — Identifies die on the wafer perimeter where adjacency to the exclusion zone may affect yield.
• Multi-site assignment — Die can be assigned to test sites for parallel probing, with site-level yield tracked independently.
• Clone support — Deep-copy wafer maps for speculative analysis or backup before destructive test operations.

4. Component Handler Control

For packaged device testing, the component handler subsystem provides the same vendor-neutral abstraction approach used by the probe station drivers. The IComponentHandler interface covers the full handler lifecycle from initialization through DUT manipulation, bin sorting, and shutdown.

Supported Equipment

DUT Operations

• Pick and place — Per-site DUT pick from input tray and placement into the test socket. Multi-site handlers execute picks across all configured sites.
• Contact verification — Electrical contact check at each test site after placement, confirming proper socket engagement before measurement begins.
• Bin sorting — After test completion, each DUT is sorted to the output bin corresponding to its assigned soft bin. Sort results include pass, fail, and retest designations.
• Index advance — Mechanical indexing to present the next set of DUTs at the test site.

Handler Lifecycle

Handlers follow a controlled lifecycle: InitializeHandlerAsync configures bin mappings, socket counts, and temperature setpoints. StartAsync begins the mechanical cycle. PauseAsync and ResumeAsync support operator intervention without full reinitialization. StopAsync ends the session and returns the handler to an idle state.

Additional Capabilities

• Temperature control — Active thermal management for hot/cold test with per-driver min/max limits.
• Throughput monitoring — Real-time UPH (units per hour) and parts-tested counters accessible through GetThroughputAsync.
• Jam management — Automatic jam detection with ClearJamAsync for recovery without operator physical intervention.

5. Binning Engine

The binning engine manages the complete lot and wafer test lifecycle, assigning soft and hard bins to tested devices based on parametric results, tracking yield at every level (lot, wafer, site), and generating the bin summary records required by downstream data systems.

Lot and Wafer Lifecycle

Bin Assignment Modes

• Direct soft bin — Assign a specific soft bin number to a site. The engine resolves the corresponding hard bin and pass/fail disposition from the bin table.
• First-fail binning — Submit a list of parametric test results. The engine identifies the first failing test, looks up its associated fail bin, and assigns that bin. If all tests pass, the first pass bin in the table is assigned.
• Die-level binning — When a wafer map is attached, bin assignments update the die record directly, enabling per-die yield tracking and heat-map generation.
• Batch assignment — Submit bin results for multiple sites in a single call. Used in multi-site test configurations where all sites complete simultaneously.

Multi-Site Support

Site counts must be powers of two (1, 2, 4, 8, 16, and so on), matching standard semiconductor test equipment configurations. The engine tracks part count, pass count, and per-bin distribution independently for each site, enabling site-to-site yield comparison to identify failing test hardware.

Yield Tracking and Alarms

• Real-time yield — Lot yield, wafer yield, and per-site yield are computed after every part submission.
• Yield alarm — Configurable threshold triggers a callback when cumulative yield drops below the setpoint. Production supervisors use this to catch systematic failures early.
• Consecutive fail alarm — Triggers when a configurable number of consecutive failures occur, indicating potential equipment problems or miscontact.
• Yield history — A rolling record of yield after each part, providing the data for real-time yield trend graphs.

6. STDF Data Output

The STDF bridge converts binning engine execution data into Standard Test Data Format version 4 binary files. STDF is the dominant data interchange format in semiconductor manufacturing, consumed by yield management systems (Galaxy, Examinator, yieldWerx), statistical process control tools, and MES platforms.

Record Types

Test Number Management

The bridge maintains a deterministic test name to test number mapping. Each unique test name encountered during a file session is assigned a sequential test number starting from 1. This mapping is stable within a single STDF file, ensuring downstream analysis tools can correlate test numbers across parts. The maximum unique test name limit is 100,000 per file.

7. TestStand Integration

The semiconductor subsystem includes 22 TestStand step types organized into four palettes. Test engineers build semiconductor test sequences by dragging step types into the TestStand sequence editor — no custom code steps required for standard probe, handler, binning, and STDF operations.

Probe Station Palette (10 step types)

Component Handler Palette (6 step types)

Binning Engine Palette (4 step types)

STDF Bridge Palette (2 step types)

8. Getting Started

Evaluating the semiconductor production test capabilities requires the S1 Foundry platform and access to the target probe station or component handler (or their simulation modes for offline development).

Evaluation Steps

1. Download S1 Foundry from the downloads page. The installer includes all semiconductor libraries and TestStand step type packages.
2. Install the TestStand palettes by running the included palette installer. The four semiconductor palettes appear in the TestStand Insertion Palette after installation.
3. Configure a probe station or handler driver in the S1 module configuration. Specify the instrument model, connection string (TCP/IP address and port), and any vendor-specific options.
4. Build a test sequence using the semiconductor step types. Start with the example sequences included in the installation, which demonstrate wafer sort and final test patterns.
5. Run in simulation mode if physical equipment is not available. All drivers support a null-transport simulation mode that returns realistic default values for offline sequence development.

Documentation

• S1 Foundry product page — Full platform overview with module catalog
• Downloads — Platform installer, module catalog PDF, and technical datasheet